Introduction
Photo voltaic day lamps (SDL) are easy and cost-effective. A number of examples of SDLs have been described in [1], [2] and [3]. An SDL with none power storage factor suffers from frequent adjustments within the gentle depth. Additionally, a backup is required after sundown. The design of a hybrid lamp is given right here. It makes use of photo voltaic PV panels and mains energy sources and gives fixed gentle output. This design can make the most of photo voltaic power even when the panel output is right down to 10%. Proportionately, that a lot load is diminished on the mains provide.
Wow the engineering world along with your distinctive design: Design Concepts Submission Information
Block diagram
The block diagram of proposed hybrid lamp is proven in Determine 1. It consists of an array of LEDs lamps: A1 to A9. Every of those lamps consists of 5, 1 W white LEDs linked in sequence. These LEDs are managed utilizing the LED driver circuits.
Determine 1 Block diagram of the hybrid lamp design with 9 LEDs lamps the place every lamp consists of 5, 1 W white LEDs linked in sequence and all LEDs are managed utilizing LED driver circuits.
LEDs are powered utilizing a 30 watt-peak (Wp) PV panel in addition to from an adapter (AC-DC converter) as proven in Determine 1. The LED drivers are managed via 9 digital output (DO) pins of the MCU. Photo voltaic panel voltage Vpvs is sensed utilizing a possible divider circuit and is linked to the ADC enter pin of MCU. Equally, present flowing via the primary LED array A1 is sensed and is linked to a different ADC pin. The adapter output voltage VMF is sensed utilizing potential divider circuit and is linked to a digital enter (DI) pin of the MCU. This can be a digital sign which is used to sense whether or not adapter energy is on the market or not. Yet another DO pin is linked to the “adapter standby mode” pin to scale back energy consumed by the adapter when all arrays are powered from photo voltaic panel and adapter is on no load.
Circuit Diagram
Determine 2 exhibits the circuit diagram. The adapter output VM is linked to the highest (crimson) rail of the circuit. After passing via diode D19 (1N5822), voltage VMD is utilized to the circuit. Equally, the center rail (yellow) is linked to the photo voltaic panel output Vpv. After passing via diode D20, voltage Vpvd is utilized to the circuit. A giant filter capacitor C2 (10000 µF 35V) is linked throughout panel terminals. This capacitor will eradicate sudden adjustments in panel voltage in order that the firmware runs easily.
Determine 2 Circuit diagram of the proposed hybrid lamp the place the adapter output VM is linked to the highest (crimson) rail of the circuit and to the photo voltaic panel output Vpv is linked to the center rail (yellow).
LED driver circuit for array A1 is proven in full element. Array A1 consists of 5 white LEDs linked in sequence. It’s linked to the bottom terminal via R1; a ten Ω, 2 W resistor. The voltage drop throughout R1 (Ipv1) is linked to ADC1 (pin 24) of the MCU IC3 ATMEGA 8 as proven in Determine 3. A1 is pushed by two PNP transistors T3 and T4 (2N4033). Transistor T3 is managed by the digital output PD0 of the MCU via NPN transistor T1 (BC546). The PD0 sign is inverted utilizing the NOT gate of IC1 (74HCT04). This sign drives transistor T2 which drives T4.
When PD0 is LOW → T3 OFF, T4 ON (A1 on photo voltaic and inexperienced indicator LED2 ON)
When PD0 is HIGH → T3 ON, T4 OFF (A1 on mains and crimson indicator LED1 ON)
In the identical means, remaining arrays A2 to A9 are managed via their respective digital output indicators. Word that resistors R2 to R9 are linked to the anodes of the LED array. That is accomplished to scale back the wiring, as single floor wire connects to all of the cathodes of the final LEDs of A2 to A9.
Determine 3 The MCU connection diagram.
The MCU and LED driver circuits are powered utilizing regulator IC4 (LM7805). It’s enter is linked to each VMD and Vpvd energy rails via D21, D22, R77 and R78. Therefore, 5 volts is on the market on both photo voltaic or mains energy sources.
Determine 4 exhibits the circuit diagram of all digital outputs. It contains two 74HCT04 ICs, IC1 and IC2, for inverting a complete of 9 digital output indicators. The 18 output traces are linked to the LED driver circuits via 18 diodes D1 to D18 (1N4148). Determine 5 exhibits the assembled PCB with LED driver circuits and the MCU interface.
Determine 4 Interconnection diagram of all digital outputs, 18 output traces are linked to the LED driver circuits via 18 diodes (D1 to D18).
Determine 5 Assembled PCB exhibiting LED driver circuits and MCU interface.
Adapter (AC-DC converter) choice
Determine 6 exhibits the adapter used within the prototype having output voltage of 18 V. Nevertheless, ideally to match the voltage at max energy (Vmp) of the photo voltaic panel we want 17.5 V. One diode in sequence can drop the voltage by about 0.7 V. There are adapters out there which have provisions for adjusting the output voltage inside ±10% tolerance. Utilizing this kind of adapter, it’s doable to set the output voltage to 17.5V.
Determine 6 Pictures of the 30 Wp, 2’ x 2’ photo voltaic panel (high) and 18V, 3 A adapter (backside). A diode is used to drop the voltage nearer to the best 17.5 V to match the Vmp of the photo voltaic panel.
Specs and calculations
The photo voltaic panel specs are as follows:
- Energy Score (P) = 30 Wp
- Voltage at MAX Energy (Vmp) = 17.5 V
- Present at MAX Energy (Imp) = 1.714 A
The calculations for the LED lamp are as follows:
- Ahead voltage of white LED = 3.12 V
- Present via array A1 = [17.5 – (5 x 3.12)] / 10Ω = 0.19 A
- Energy consumed by array A1 = 17.5 * 0.19 = 3.325 W
- Energy consumed by 9 LED arrays = 9 x 3.325 = 29.9 W
Algorithm
As mentioned earlier, the hybrid lamp attracts energy from each photo voltaic PV panels and the adapter. If each provides are current, then it runs a most energy level monitoring (MPPT) algorithm to maximise solar energy. Desk 1 exhibits the working modes.
Desk 1 Working modes of the hybrid lamp. If each provides are current, the design runs an MPPT algorithm to maximise solar energy.
Variables
The next are the variables used for the algorithm:
- n: Variety of arrays that are PV Powered (n = 9 is initially set to deal with full solar energy)
- PV_POWER: energy drawn from PV panel
- PRESENT_MODE: current mode of operation
- NEW_MODE: new mode of operation
The permissible numerical values of PRESENT_MODE and NEW_MODE are as follows the place legitimate worth(s) of n are indicated within the brackets for every mode:
- 0: Photo voltaic Day Lamp mode (n = 9)
- 1: Mains Powered mode (n = 0)
- 2: MPPT (n varies from 1 to 9)
Constants
The next are the constants used for the algorithm:
- POWER_MIN: The minimal worth of energy. If PV energy is < POWER_MIN, then declare photo voltaic not current. (POWER_MIN = 1 W or 1600 counts)
- P_DELTA: This worth is used for producing hysteresis. (P_DELTA = 1 W OR 1600 Counts)
- VPV_MIN: This worth is used for checking whether or not PV energy is on the market or not. PV Energy will not be out there if Vpv < VPV_MIN. (16 V OR 800 Counts of ADC0)
Information
The next is the info used for the algorithm:
- Array P(n): This information is utilized by the algorithm to manage LED lamps A1 to A9. Desk 2 exhibits the array of constants outlined over 10 energy ranges.
Desk 2 An array of constants outlined for 10 energy ranges.
ADC particulars
The next are the ADC specs. A rely of 1024 corresponds to a 5 V enter to the ADC pin:
- ADC decision: 10 bits (1024 counts)
- ADC reference voltage = 5 V
Vpv calculations
Photo voltaic panel output Vpv calculations are as follows:
- VPV_MIN = 16 V (when MPPT is operating, Vpv is maintained above VPV_MIN)
- ADC enter voltage for VPV_MIN = 16 * 0.2444 = 3.91 V
- ADC rely for 3.91 V = (1024/5) * 3.91 = 801
VPV_MIN calculations
VPV_MIN calculations are as follows:
- VPV_MIN = 16 V (when MPPT is operating, Vpv is maintained above VPV_MIN)
- ADC enter voltage for VPV_MIN = 16 * 0.2444 = 3.91 V
- ADC rely for 3.91 V = (1024/5) * 3.91 = 801
Ipv calculations
Photo voltaic panel output present Ipv calculations are as follows:
- Panel energy at most energy level = 30 W
- Present at most energy level = 30/17.5 = 1.714 A
- When all arrays A1 to A9 are ON, Present via every array = 1.714/9 = 0.19 A
- Drop throughout 10 Ω resistor R1 = 10 * 0.19 = 1.9 V
- ADC Rely for 0.19 Amp = (1024/5) * 1.9 = 390 rely
Energy calculations
Lastly, the ability calculations will be seen beneath:
- Learn ADC0 → Rely for VPVS
- Learn ADC1 → Rely for IPV1
- PV_POWER_32 = ADC0 * ADC1 * n
- PV_POWER = PV_POWER_32 / 64 (Shift proper by 6 bits)
- PV energy generated when one array is ON = 876 * 390 = 341640 counts
- PV energy generated when 9 arrays are ON (30W) = 341640 * 9 = 3074760 counts
To restrict the decision to 16 bits, the counts are divided by 64:
- Rely for 30 W -> 3074760 / 64 = 48043.125
- Rely for 1 W -> 48043/ 30 = 1601.4375 Rely or 1600 approx
Circulate charts
The movement charts required for growth of embedded firmware are given in Determine 7, Determine 8, Determine 9, and Determine 10. At energy ON, the algorithm initializes timer, ports, modes and permits timer interrupt. The algorithm is executed contained in the timer interrupt service routine.
Determine 7 Initialization movement chart the place at energy ON, algorithm initializes timer, ports, modes and permits timer interrupt.
Determine 8 A portion of the interrupt service routine the place the algorithm is executed.
Determine 9 The remainder of the interrupt service routine the place the algorithm is executed.
Determine 10 The MPPT movement chart that’s run if each provides are current.
Fabrication and testing
The LED lamp metallic core PCBs (MCPCBs) had been mounted on three aluminum channels. The aluminum channels take in the warmth generated by these PCBs and supply structural help. The controller PCB is mounted on the again facet of the LED array. The working of hybrid lamp is captured within the images proven in Determine 11 and Determine 12 the place the lamps are engaged on 100% solar energy and 100% mains energy respectively. The lamp is positioned in entrance of a mirror to examine the sunshine output from LED array. Concurrently, we will see the PCB and the indicator LEDs. From these two Figures, it’s clearly seen that we get identical gentle output whether or not the array is photo voltaic powered or mains powered.
Determine 11 Lamp engaged on 100% photo voltaic power (all inexperienced indicator LEDs are ON).
Determine 12 Lamp engaged on 100% mains energy (all crimson indicator LEDs are ON).
In an effort to seize the dynamic workings of the lamp, when the photo voltaic power is various and the MPPT algorithm is operating, see the video beneath.
On this video, we’re in a position to see LED array gentle output within the mirror and in addition observe the indicator LEDs altering from inexperienced to crimson and vice versa sequentially. On this case, the photo voltaic panel is rotated within the daylight to fluctuate the PV energy generated. This video confirms that the MPPT algorithm is working correctly because the LED array offers a continuing gentle output when there may be extensive variation in solar energy. One inexperienced LED is ON, which means 11% of the power is coming from photo voltaic. So, relying upon the variety of inexperienced LEDs which might be ON, we will calculate the proportion discount within the load on the mains energy provide.
When the entire array is operating on solar energy, we will make the digital output line going to the standby enter of the adapter excessive (discuss with Determine 1). Thus, lowering the ability consumed by the adapter beneath no-load situation. Please be aware that this function has not been carried out within the current code.
Energy ASIC design
The {hardware} complexity will be diminished by designing a devoted energy ASIC. The principle options of the proposed ASIC are as follows:
- Variety of LED driver circuits: 16
- MAX Voltage score of drivers : 50 V
- MAX present score of every driver: 0.5 A
- Regulated management energy provide: 5 V, 1A
- Sensing circuits for: Vpvs, Ipv1, VM
Design of a 500 W fixture
Based mostly on the hybrid lamp design given right here, a bigger lighting fixture will be designed. Right here, an instance of such a system, which makes use of a single 500 Wp photo voltaic panel is given. The high-level particulars of proposed design are as follows:
- PV panel specs: 500 Wp, Vmp = 35 V, Imp = 14.2 A
- LED lamp energy score:11 Watts (11 white LEDs linked in sequence)
- Variety of lamps: 64 (8 x 8 array)
- Variety of ASICs required: 4
This lighting fixture will be put in in giant purchasing facilities, hospitals, workplaces and so on., the place it would present fixed gentle whereas maximizing the utilization of accessible photo voltaic power. Even on a cloudy day it could cut back the load on the mains provide by 10 to twenty%. Such a system could have an ROI of three to 4 years. Moreover, it affords many different advantages resembling decentralized design, very quick wiring, decrease transmission losses and gives gentle within the daytime if the mains energy fails.
Vijay Deshpande just lately retired after a 30-year profession targeted on energy electronics and DSP initiatives, and now works primarily on photo voltaic PV methods.
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