A trans-inductor voltage regulator (TLVR) modifies the standard multiphase buck converter, accelerating the converter’s output present slew-rate pace capabilities to method the quick load slew price of the high-speed processor or application-specific built-in circuit’s core voltage rail. The output inductors every get a secondary winding, that are related in sequence to create a secondary loop to speed up the response to load modifications. This enchancment in load transient efficiency is at the price of elevated steady-state ripple and its ensuing energy loss, nevertheless. The issue is that it is vitally arduous to estimate the precise general inductance within the secondary loop, which is a main driver of efficiency, as structure and printed circuit board (PCB) development can considerably have an effect on it. On this energy tip, I’ll present a easy measurement that you should utilize to estimate precise leakage inductance within the TLVR secondary loop and optimize efficiency.
Determine 1 is a simplified schematic of the multiphase buck converter with out and with the TLVR circuit.
Determine 1 Simplified multiphase buck converter and TLVR schematics. Supply: Texas Devices
Word the added secondary loop within the TLVR connecting the entire secondaries of the output inductors with the compensating inductor worth, Lc, and parasitic parts proven. The sum of all of those inductances is the overall secondary-loop inductance, or Ltsl. Ltsl determines TLVR efficiency, as each the added output present slew price and high-frequency ripple present from the TLVR loop are inversely proportional to it. Due to the unpredictability of the parasitic inductances, when the TLVR was first launched, it included a hard and fast Lc within the secondary loop.
The present method units Lc to “swamp out” the parasitic inductances, assuming that they’re much lower than Lc. However there’s a scope measurement throughout Lc that both will confirm this assumption, or if not, present the data you might want to estimate the Ltsl. You’ll be able to then regulate Lc to raised match the goal general leakage for finest slew-rate functionality and ripple present efficiency, and in some instances omit it.
The TLVR efficiency equation is the output present slew-down functionality ΔI/Δt in amperes per microseconds (A/µs), with some latest purposes asking for as a lot as 5,000 A/µs. Slew-up functionality is simply as essential, however with VIN (12 V sometimes) usually a lot higher than VOUT (0.7 V to 1.8 V sometimes), the slew-up price functionality will usually be a lot higher, and probably extreme. Limiting what number of phases you possibly can activate on the similar time will normally scale back extreme slew-up functionality.
The equations in Desk 1 present that the load slew-rate acceleration is inversely proportional to Ltsl. Desk 2 reveals that the high-frequency TLVR currents are additionally inversely proportional to Ltsl.
Buck slew down ΔI/Δt |
L is the worth of the discrete output inductor at every stage |
|
TLVR slew down ΔI/Δt |
Lm is the worth of the magnetizing inductance at every stage |
|
Ltsl |
(Assuming that Ltsl = Lc [1]) |
LLeakage is outlined because the leakage inductance of every output inductor |
Desk 1 Buck and TLVR slew-down ΔI/Δt equations. Supply: Texas Devices
Time interval the place all phases are off (TOFF) |
Fsw is the switching frequency of every part |
|
Excessive frequency p-p present ripple (ΔILtsl) |
Within the secondary loop and in every energy stage |
|
Root-mean-square (RMS) worth of this present |
|
Desk 2 TLVR high-frequency currents within the secondary winding and all phases when VOUT ´ Nphases < VIN. Supply: Texas Devices
Under in Desk 3 are the anticipated voltages throughout Lc when VOUT x Nphases < VIN assuming Ltsl ≈ Lc, and recalculation of Ltsl when smaller voltages are seen.
Voltage throughout Ltsl (and Lc if Ltsl ≈ Lc) when one part is on |
Assuming the polarity of Lc as proven in Determine 1 |
|
Voltage throughout Ltsl (and Lc if Ltsl ≈ Lc) when all phases are off |
Assuming polarity of Lc as proven in Determine 1 |
|
RMS of the waveform |
|
|
Estimating Ltsl when the precise waveform is smaller than the anticipated waveform |
Use calculated VLtslrms and measured VLcrms |
Desk 3 Anticipated voltage waveform throughout Lc when VOUT x Nphases < VIN assuming Ltsl ≈ Lc, and recalculation of Ltsl when smaller voltages are seen. Supply: Texas Devices
Now it’s time to introduce a design instance, beginning with the necessities and general method, as proven in Desk 4.
VIN |
12 V |
TLVR loops |
2 loops interleaved |
VOUT |
1.0 V |
Every loop |
>2,500 A/µs |
Maximum IOUT |
1,000 A |
Phases Ncomplete |
16 |
Energy phases |
32 |
Phases Nphases |
8 |
Phases |
16 |
Lm |
120 nH |
Phases/part |
2 |
Goal Ltsl |
100 nH |
Fsw every part |
570 kHz |
Ripple frequency |
4.56 MHz |
Most load step |
500 A |
Ripple p-p/RMS |
11.7 A/3.4 A |
Load slew price |
5,000 A/µs |
VLtsl on/off |
–8 V/+16 V |
|
|
VLtslrms |
11.3 VRMS |
Desk 4 Design necessities and general method. Supply: Texas Devices
This 32-stage design makes use of two TLVR loops every on the near-5-MHz sawtooth frequency, however 180 levels out of part with a view to obtain good however imperfect cancellation of the sawtooth waveforms within the output capacitors. With out TLVR, even with 32 phases and inductors at solely 70 nH, the quickest slew-down price could be 460 A/µs. Based mostly on the equations in Desk 2, the slew-down functionality could be -5,387 A/µs. Getting this >5,000 A/µs slew-rate functionality requires accepting a high-frequency ripple present in every part of three.4 ARMS.
I examined a board constructed up with the idea that Ltsl ≈ Lc and used 100 nH the goal Ltsl for Lc. Determine 2 reveals the structure of one of many two TLVR loops.
Determine 2 The structure of a 16-power-stage TLVR loop. Supply: Texas Devices
However is the 100-nH Lc actually the true Ltsl of this 16-stage loop? See the massive secondary loop between “begin” and “finish” in Determine 2. Measuring the precise voltage waveform throughout Lc (L36 right here) when all 16 phases and eight phases are energetic sheds mild on this assumption. If Ltsl ≈ Lc and utilizing the formulation from Desk 3, you must anticipate a sq. wave going between +8 V and -16 V at eight occasions the per-phase switching frequency. The RMS worth of this waveform needs to be 11.3 V.
Determine 3 reveals what I really measured.
Determine 3 Measured voltage waveform throughout an eight-phase/16-stage compensating inductor with anticipated TLVR waveform if Ltsl ≈ Lc, proven in black. Supply: Texas Devices
Each the precise L36 waveform (pink) versus the anticipated complete leakage waveform (black) and the RMS worth (5.02 V versus 11.3 V) level to Lc being one-half the Ltsl and level to that reality that there’s one other 100 nanohenries from inductor leakages and PCB traces within the secondary loop. Evaluating the precise versus anticipated RMS values as an alternative of peak values will scale back the confusion launched by the parasitic ringing evident on the measured waveform.
With the overall inductance within the secondary loop at 200 nH, the output present slew-down functionality is lowered to -2,827 A/µs for the 32-stage design. For the 5,000 A/µs load slew-rate utility, shorting out the precise Lc lowered the overall secondary inductance again to 100 nH. For purposes with a most load slew price lower than 3,000 A/µs, leaving the compensating inductors in place will scale back circulating high-frequency currents by half and scale back losses from these currents by 75%.
Acquiring leakage inductance
Figuring out the precise leakage inductance in your TLVR loop will put you in one of the best place to get your output present slew price whereas minimizing added losses brought on by the TLVR loop. Discovering that one easy measurement gives you the required data is one instance of what my colleagues and I pursue at Texas Devices within the pursuits of power-management optimization.
Josh Mandelcorn has been at Texas Instrument’s Energy Design Companies crew for nearly twenty years centered on designing energy options for automotive and communications / enterprise purposes. He has designed high-current multiphase converters to energy core and reminiscence rails of processors dealing with massive fast load modifications with stringent voltage below / overshoot necessities. He beforehand designed off-line AC to DC converters within the 250 W to 2 kW vary with a concentrate on emissions compliance. He’s listed as both an creator or co-author on 17 US patents associated to energy conversion. He obtained a BSEE diploma from the Carnegie-Mellon College, Pittsburgh, Pennsylvania.
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References
- Schurmann, Matthew, and Mohamed Ahmed. “Introduction to the Trans-inductor Voltage Regulator (TLVR).” Texas Devices Energy Provide Design Seminar SEM2600, literature No. SLUP413. 2024-2025.
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