Variable regulated energy provides are helpful instruments discovered on well-equipped electronics lab benches. The symmetrical varieties that produce equal voltage outputs of reverse polarity, are much more so. Determine 1’s model of a symmetrical 0 V to 10 V, 1.5 A lab provide implements an additional helpful trick: laptop programming by way of a single PWM output.
Determine 1 LM337, LM317, and CD4053 be part of forces in a symmetrical 0 to +10 V PWM programmed energy provide.
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In Determine 1’s PWM DAC interface, DPST switches U1a and U1b settle for a 10-kHz PWM 5-V sign to generate a +1.25 V to -8.75 V “ADJ” management sign on C2 for the U2 regulator. Vout = ADJ – 1.25 V, so ADJ = 1.25 V forces an output of zero and U3 follows alongside. On the different finish of the span, ADJ = -8.75 V makes them make 10 V. Present supply Q1 reduces zero offset error by (largely) nulling out the 65 µA (typical) 337 ADJ pin bias present.
Inverter change U1c supplies energetic ripple filtering by way of analog subtraction. Different PWM frequencies may be accommodated by proportional scaling of filter caps C1 and C2.
The suggestions loop established by R2 and R3 makes the ten V full-scale outputs proportional to U2’s precision inside reference. This makes output voltage an correct operate of PWM responsibility issue DF with performance (DF starting from 0 to 1) given by…
Vout (+/-) = +/-1.25 DF / (1 – 0.875 DF)
…as graphed in Determine 2.
Determine 2 Vout (0 to -10 V and +10 V) versus PWM responsibility issue, DF (0 to 1). The black curve is LM317’s Vout = 1.25 DF / (1 – 0.875 DF). The purple curve is LM337’s Vout = -1.25 DF / (1 – 0.875 DF).
Determine 3 plots the inverse of Determine 2, yielding the PWM DF required for any desired Vout. 
Determine 3 The PWM DF required for any desired Vout. PWM DF = |Vout| / (0.875 |Vout| + 1.25).
For the corresponding 8-bit PWM setting:
Dbyte = 255 DF = 255 |Vout| / (0.875 |Vout| + 1.25)
Truly, as proven in Determine 4, the Vout-to-DF relation is surprisingly near logarithmic. 
Determine 4 DF (x-axis) versus Vout (y-axis) is (pretty) near a logarithmic operate, which makes good use of restricted 8-bit PWM decision.
The availability rail inputs have to be not less than 13 V to accommodate U2’s and U3’s minimal headroom requirement. The unfavorable enter is restricted to a 15 V max in recognition of U1’s 20-V absmax ranking.
U2’s 0 to -10 V output is inverted by the Q2, Q3, and This fall differential amplifier by way of suggestions to U3’s ADJ enter, forcing U3 to trace U2. This ends in the symmetrical outputs plotted in Determine 2. Q5 supplies U3’s minimal output load whereas R6 does that job for U2.
U2 and U3 should in fact be adequately heatsunk as dictated by their energy dissipation which is the same as output present multiplied by the Vin to Vout differential. Most heating (as much as 20 W) due to this fact happens at excessive present and low voltage.
Stephen Woodward’s relationship with EDN’s DI column goes again fairly a great distance. Over 100 submissions have been accepted since his first contribution again in 1974.
Associated Content material
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- Cancel PWM DAC ripple with analog subtraction—revisited
- Quick-settling synchronous-PWM-DAC filter has nearly no ripple
- Cancel PWM DAC ripple and energy provide noise
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