Digital potentiometers (“Dpots”) are a various and helpful class of digital/analog elements with as much as a 10-bit decision, factor resistance from 1k to 1M, and voltage functionality as much as and past ±15v. Nonetheless, most are restricted to eight bits, monopolar (usually 0v to +5v) sign ranges, and 5k to 100k resistances with free tolerances of ±20 to 30%.
Wow the engineering world together with your distinctive design: Design Concepts Submission Information
This design concept describes a easy and cheap Dpot-like various. It has limitations of its personal (primarily being restricted to comparatively low sign frequencies) however presents helpful and sometimes superior efficiency in areas the place precise Dpots are likely to fall quick. These embody parameters like bipolar sign vary, terrific differential nonlinearity, tight resistance accuracy, and programmable decision. See Determine 1.
Determine 1 PWM drives opposing-phase CMOS switches and RC community to simulate a Dpot
RC ripple filtering limits frequency response to usually tens to a whole bunch of Hz.
Swap U1b connects wiper node W to node B when PWM = 1, and to A when PWM = 0. Letting the PWM responsibility issue, P = 0 to 1, and assuming no extreme loading of W:
Vw = P(Vb – Va) + Va
In the meantime, swap U1a connects W to node A when PWM = 1, and to B when PWM = 0, thus 180o out of part with U1b. Resulting from AC coupling, this has no impact on pot DC output, however the part inversion relative to U1b delivers energetic ripple attenuation as described in “Cancel PWM DAC ripple with analog subtraction.”
The minimal RC time-constant required to attenuate ripple to not more than 1 least important bit (lsb) for any given N = variety of PWM bits of decision and Tpwm = PWM interval is given by:
RC = Tpwm 2(N/2 – 2)
For instance:
for N = 8, Fpwm = 10 kHz
RC = 10 kHz-1*2(8/2 – 2) = 100 µs*22 = 400 µs
The utmost acceptable worth for R is dictated by the required Vw voltage accuracy underneath load. Minimal R is decided by:
- Required resistance accuracy after factoring within the variability of U1b swap Ron: r which is 40 ±40Ω for the HC4053 powered as in Determine 1.
- Required integral nonlinearity (INL) as affected by switch-to-switch Ron variation, which is simply 5 Ω for the HC4053 as powered right here.
R = 1k to 10k can be a workable vary of selections for N = 8-bit decision. N is programmable.
The web result’s the equal circuit proven in Determine 2. Observe that, in contrast to a mechanical pot or Dpot, the place output resistance varies dramatically with wiper setting, the PWMpot’s output resistance (R +r) is nominally fixed and impartial of setting.
Determine 2 The PWMpot’s equal circuit the place r = swap Ron, P = PWM responsibility issue, and the place the ripple filter capacitors usually are not proven.
Humorous footnote: Whereas pondering a reputation for this concept, I initially thought “PWMpot” was too lengthy and regarded making it shorter and catchy-er by dropping the “WM.” However then, after studying the ensuing acronym out loud, I made a decision it was perhaps a bit too catchy.
And put the “WM” again!
Stephen Woodward’s relationship with EDN’s DI column goes again fairly a good distance. Over 100 submissions have been accepted since his first contribution again in 1974.
Associated Content material
- Cancel PWM DAC ripple with analog subtraction
- A quicker PWM-based DAC
- Parsing PWM (DAC) efficiency: Half 1—Mitigating errors
- PWM energy DAC incorporates an LM317
- Cancel PWM DAC ripple with analog subtraction however no inverter
- Cancel PWM DAC ripple with analog subtraction—revisited
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