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Energy Suggestions #136: Design an lively clamp circuit for rectifiers at a excessive switching frequency



Energy Suggestions #136: Design an lively clamp circuit for rectifiers at a excessive switching frequency

Introduction

In automobile electrical methods, a high- to low-voltage DC/DC converter is a reversible digital machine that modifications the DC from the automobile’s high-voltage (400 V or 800 V) battery to a decrease DC voltage (12 V). These converters may be unidirectional or bidirectional. Energy ranges from 1 kW to three kW are typical, with methods requiring elements rated at 650 V to 1,200 V for the converter’s high-voltage energy internet (major facet) and no less than 60 V on the 12-V energy internet (secondary facet).

The necessity for higher energy density and a smaller powertrain led to elevated switching frequencies for energy elements to a number of hundred kilohertz, as a way to assist shrink the dimensions of magnetic elements. The miniaturization of a high- to low-voltage DC/DC converter exposes many points that aren’t as vital at decrease switching frequencies, comparable to electromagnetic compatibility (EMC), thermal dissipation, and lively clamp for metal-oxide semiconductor field-effect transistors (MOSFETs). On this energy tip, I’ll focus on the design of clamping circuits for synchronous rectifier MOSFETs at a excessive switching frequency.

Conventional lively clamp

The phase-shifted full bridge (PSFB) proven in Determine 1 is a well-liked topology in high- to low-voltage DC/DC purposes as a result of it might probably obtain tender switching on switches to extend converter effectivity. However you’ll be able to nonetheless count on to see high-voltage stress on the synchronous rectifier, as its parasitic capacitance resonates with the transformer leakage inductance. The voltage stress of the rectifier might be as excessive as Equation 1:

Vds_max = 2VIN x (Ns/Np)                      (1)

the place Np and Ns are the transformer’s major and secondary windings, respectively.

Contemplating the facility degree of a high- to low-voltage DC/DC converter and the facility losses of a resistor-capacitor-diode snubber [1], designers usually use lively clamp circuits for synchronous rectifier MOSFETs. Determine 1 exhibits the standard circuits.

Determine 1 Conventional lively clamp circuit for PSFB synchronous rectifier MOSFETs. Supply: Texas Devices

On this schematic, you’ll be able to see the P-channel metal-oxide semiconductor (PMOS) Q9 and the snubber capacitor, that are the primary components of the lively clamp circuit. One terminal of the snubber capacitor connects to the output choke, and the supply of the PMOS connects to floor. In a standard lively clamp circuit for a PSFB, synchronous rectifier MOSFET Q5 and Q7 have the identical scheme; so do Q6 and Q8. Every time after the synchronous rectifier MOSFETs shut down, the PMOS will activate with a correct delay time.

Determine 2 exhibits the management scheme of the PSFB and lively clamp. You’ll be able to simply discover that the switching frequency of PMOS might be double the fsw.

Determine 2 Management scheme of lively clamp PMOS Q9 the place the switching frequency of the PMOS is doble the fsw. Supply: Texas Devices

Evaluating lively clamp loss

You need to use Equation 2, Equation 3, Equation 4, Equation 5, and Equation 6 to judge the lack of the lively clamp PMOS. Aside from Pon_state, the entire different losses are proportional to fsw. When the switching frequency of the PMOS doubles, the loss doubles, so you will want to resolve the PMOS thermal situation. And the precise thermal situation seems to be even worse when pushing the fsw greater to fulfill the wants for miniaturization.

Pon_state = Irms2 x Rdson                                (2)

Pturn_on = 0.5 x Vds x Ion x ton x fsw        (3)

Pturn_off = 0.5 x Vds x Ioff x toff x fsw        (4)

Pdrive = Vdrv x Qg x fsw                                   (5)

Pdiode = Isnubber x Vsd x td x fsw                 (6)

The proposed lively clamp

So, what are you able to do? To pick out PMOS with higher determine of benefit (FOM) or to decide on thermal grease with greater conductivity coefficient? Each are OK however keep in mind the thermal situation brought on by lively clamp nonetheless concentrates at one half which makes the problem exhausting to resolve. Can we divide the thermal into a number of components? A possible approach is to make use of two lively clamp circuits and join the terminal of the snubber capacitor to the switching node of the secondary legs, as Determine 3 exhibits. Then you’ll be able to solely activate Q11 after Q5 and Q7 flip off, and solely activate Q10 after Q6 and Q8 flip off. Determine 4 exhibits the management scheme of the PSFB and proposed lively clamp.

Determine 3 Proposed lively clamp circuit for PSFB synchronous rectifier MOSFETs. Supply: Texas Devices

Determine 4 Management scheme of the PSFB and proposed lively clamp. Supply: Texas Devices

When Q5 and Q7 flip off, Q6 and Q8 are nonetheless on. So, you’ll be able to find the clamp loops for Q5 and Q7, as indicated by the inexperienced arrows in Determine 3. The switching frequency of Q10 and Q11 are each fsw, not double the fsw.

So, based on Equation 2, Equation 3, Equation 4, Equation 5, and Equation 6, Pon_state of every PMOS might be one quarter of authentic, Pturn_on, Pturn_off, Pdrive, and Pdiode might be one half of authentic. Clearly, the proposed technique divides the lack of the clamp circuit into two components and even much less, which makes it simpler to take care of the thermal situation.

Let’s come again to the clamp loop. Q5 has a bigger loop than Q7; it’s just like Q6 and Q8. You have to to concentrate to the structure of the synchronous rectifiers as a way to get a minimal clamp loop for Q5 and Q6.

Proposed lively clamp efficiency

Determine 5 and Determine 6 exhibits the associated exams from the Excessive-Voltage to Low-Voltage DC/DC Converter Reference Design with GaN HEMT from Texas Devices, which makes use of the proposed lively clamp circuit working at a 200-kHz switching frequency. Determine 5 exhibits the voltage stress of the rectifier.

Determine 5 Voltage stress of the rectifier the place CH1 is the Vgs of the rectifier, CH2 is the Vds of the rectifier, CH3 is the voltage for the first transformer winding, and CH4 is the present for the first transformer winding. Supply: Texas Devices

CH1 is the Vgs of the rectifier, CH2 is the Vds of the rectifier, CH3 is the voltage for the first transformer winding, and CH4 is the present for the first transformer winding. The utmost voltage stress of the rectifier is beneath 45 V at 400 VIN, 13.5 VOUT, 250-A IOUT. The utmost temperature of the lively clamp circuit is 46.6°C at 400 VIN, 13.5 VOUT, 180-A IOUT [2], as proven in Determine 6. So, the proposed management scheme achieves fairly good thermal efficiency for the clamping MOSFET.

Determine 6 Thermal efficiency of the lively clamp circuit the place the utmost temperature of the lively clamp circuit is 46.6°C at 400 VIN, 13.5 VOUT, 180-A IOUT. Supply: Texas Devices

500-kHz lively clamp sans thermal points

When selling switching frequency from 200 kHz to 500 kHz, the amount of transformer will shrink about 45% [2], which is able to assist to advertise the facility density of the Excessive-Voltage to Low-Voltage DC/DC Converter. With the proposed technique, BOM value will enhance a bit of, however designer can run the lively clamp at 500-kHz switching frequency with out thermal situation, resulting in improved efficiency. Contemplating the pulsed drain present of PMOS is much smaller than NMOS, designer may also use NMOS in lively clamp with remoted driver and bias energy provide if essential.

Daniel Gao works as a system engineer within the Energy Provide Design Companies crew at Texas Devices, the place he focuses on growing OBC and DC/DC converters. He acquired the M.S. diploma from Central South College in 2010.

 

 Associated Content material

 References

  1. Betten, John. 2016. “Energy Suggestions: Calculate an R-C Snubber in Seven Steps.” TI E2E™ design help boards technical article, Might 2016.
  2. Excessive-Voltage to Low-Voltage DC-DC Converter Reference Design with GaN HEMT.” 2024. Texas Devices reference design take a look at report No. PMP41078, literature No. TIDT403A. Accessed Dec. 16, 2024.
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