Developer, researcher, and self-described “neuromorphic chip fanatic” Renaldas Zioma has reacted to the discontinuation of the traditional Zilog Z80 in a sensible method: by designing a fully-compatible open-hardware substitute, a prototype of which is because of be manufactured as a part of the subsequent Tiny Tapeout fabrication run.
“It’s a time for open supply and {hardware} preservation neighborhood to step in with a Free and Open Supply Silicon (FOSS) substitute for Zilog Z80,” Zioma explains of his challenge. “GOAL: To develop a drop-in Z80 substitute in eight-bit dwelling computer systems resembling ZX Spectrum. The primary fabrication of FOSS Z80 is scheduled for June of 2024!”
The Z80 is again, in free and open supply type — due to an effort to construct a bodily FOSS clone of the traditional eight-bit chip. (📷: Renaldas Zioma)
Zilog stunned the classic computing neighborhood earlier this month when it introduced that it was to discontinue the standalone CPU variants of the eight-bit Z80 microprocessor after almost fifty years in manufacturing. Launched as the corporate’s first product in 1976 and designed by former Intel engineer and firm co-founder Federico Faggin and early worker Masatoshi Shima, the chip turned one of the vital standard designs for microcomputers — going head-to-head with rival MOS Expertise’s 6502 and its successors.
Whereas there’s nonetheless another manufacturing run scheduled, with a last-time-buy (LTB) date of 14 June 2024, Zioma’s planning forward with the FOSS Z80 challenge — creating an open supply clone of the chip constructed utilizing the open supply SkyWater 130nm course of design equipment (PDK) and the OpenROAD workflow. Whereas a 130nm course of is much from the bleeding edge, the place chipmakers have moved to manufacturing processes acknowledged in single-digit-nanometer measurements, it is much more superior than the Z80’s authentic 4μm course of node — over 30 instances smaller, the truth is.
Whereas Z80 cores able to operating on a field-programmable gate array (FPGA) have existed for some time — and Zioma’s model taking considered one of these, Man Hutchison’s TV80 core, as a base for the challenge — the FOSS Z80 is completely different in that it will likely be produced in silicon as a bodily chip. This, Zioma explains, might be achieved utilizing the Tiny Tapeout challenge, a multi-project chip platform that sees compact designs bundled collectively to dramatically cut back the price of manufacturing — delivering a working chip for as little as $150, relying on the complexity of the design.
An preliminary prototype of the design is because of be constructed as a part of the Tiny Tapeout 7 manufacturing run, taking on 4 tiles of the chip format. (📷: Renaldas Zioma)
Zioma’s design will not be a drop-in substitute for a DIP-packaged Z80 — no less than, not at first. The Tiny Tapeout model, although, will function a test-bed to show the design works — and can then be adopted by a larger-scale manufacturing run by way of the Efabless chipIgnite platform to construct an application-specific built-in circuit (ASIC) model for set up right into a yet-to-be-designed adapter board providing a DIP40 pinout appropriate with the unique Z80.
Ought to the challenge get that far, Zioma has even proposed making an attempt to design a variant that may mimic the format of the unique Z80 die — initially created by laying out all 8,500 transistors by hand.
The supply code for the challenge has been revealed to GitHub beneath the permissive Apache 2.0 license, whereas the model submitted to Tiny Tapeout is seen on the web site — taking on a 2×2 tile block of the shuttle for Tiny Tapeout 7.
