Categories: Electronics

Single-supply single-ended enter to pseudo class A/B differential output amp



From the micromixer topology by Barrie Gilbert [1], this amplifier permits a single-ended enter to be transformed to a Class A/B present output from a single provide.

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As proven in Determine 1 with an LTspice implementation, the circuit employs 6 bipolar transistors (BJTs) in a singular configuration which “directs” the output present from Q3 and This autumn dependent upon enter polarity.

Determine 1 LTspice schematic of the micromixer topology with 6 BJTs organized such that the output present from Q3 and This autumn are dependent upon enter polarity.

The way it works

C1 serves as a decoupling capacitor which permits the potential at Q1 base to fluctuate from the biased Vbe with the Q1 diode connection. Q2 acts as a mirror to Q1 for optimistic enter indicators and cuts off for giant unfavorable inputs; whereas Q3 is a cascode below small sign situations, and sources massive unfavorable enter currents.

With ultimate equal-sized transistors, all collector currents are equal and set by the base-emitter voltages of Q5 plus Q6, that are decided by the present by means of R3 as Ibias.

When the enter sign is massive and optimistic, enter present flows largely by means of Q1 which acts as a transconductor and cascode system and Q3 turns into cutoff as its emitter voltage rises. Q2 “mirrors” the Q1 collector present by means of cascode system This autumn, which sinks a duplicate of the massive optimistic enter present because the optimistic output.

Massive sign inputs

On massive unfavorable inputs, all of the enter present is sourced by Q3 as its emitter voltage drops and Q1 turns into cutoff, with Q3’s collector sinking the unfavorable output (Determine 2). Be aware that for giant optimistic inputs, the output currents are “directed” to both This autumn (+) or Q3(-) and limitless with ultimate gadgets.

Determine 2 LTspice simulation of differential output in response to massive unfavorable sign inputs.

Small sign inputs

As proven in Determine 3, with smaller inputs, the circuit acts like a small sign Class A kind as all of the transistors function with an Ibias collector present. So, with zero enter present, each Q1 and Q3 conduct Ibias, as does Q2 and This autumn and the circuit acts with a differential output.

Determine 3 LTspice simulation of differential output in response to small unfavorable enter present.

Precise outcomes

Determine 4 exhibits precise outcomes from the circuit in Determine 1, proven on a DSO with a sine-wave enter of 2Vpp @ 1KHz. Determine 5 exhibits the LTspice simulation outcomes of Determine 1. Be aware the LTspice plots have been arrange with colour and show offset bias to match DSO show for comparisons.

Determine 4 Precise outcomes of Determine 1 schematic proven on a DSO with a sine-wave enter of 2Vpp @ 1KHz.

Determine 5 LTspice simulation outcomes of Determine 1 the place the plots have been arrange with colour and show offset bias to match DSO show for comparisons

Additionally observe the slight “cross over distortion” proven in each the DSO and LTspice outcomes—widespread to traditional Class A/B phases. This may be improved with a better Ibias on the expense of upper amplifier dissipation.

This topology presents extra options different than simply single-to-differential Conversion [1]. It addresses the dynamic enter impedance as a operate of instantaneous enter sign stage; an space usually not addressed in typical amplifier discussions.

Sign induced distortion begins with the efficient amplifier enter impedance altering with dynamic sign stage and dealing in opposition to the supply impedance making a non-linear sign dependent voltage/energy divider which modulates the enter sign stage.

Bettering enter impedance

Determine 6 exhibits a model the place extra resistors are added to enhance the enter impedance variation with enter sign stage [2]. Be aware the inclusion of extra resistors to assist steadiness the enter impedance variations over massive enter sign swings whereas nonetheless sustaining an equal collector present bias for every system as decided by Ibias.

Determine 6 A excessive dynamic vary amplifier with extra resistors to assist steadiness the enter impedance variations over massive enter sign swings whereas nonetheless sustaining an equal collector present bias for every system as decided by Ibias.

As proven in Determine 7 and Determine 8, the LTspice enter impedance outcomes have been created by taking the spinoff of enter voltage with respect to enter present because the enter is swept throughout a big optimistic and unfavorable vary.

For extra particulars see references [1] and [2].

Determine 7 Small sign enter impedance outcomes and output differential present.

Determine 8 Massive sign +10 V peak enter impedance outcomes and output differential present.

Excessive bandwidth and dynamic vary single-to-differential amplifier circuit

These circuits function within the “present area” and may provide very excessive bandwidths with excessive dynamic vary at low static energy dissipation from a single provide. Within the distant previous, the creator has applied this with excessive frequency SiGe bipolar transistors in a BiCMOS course of with good outcomes.

Michael A Wyatt is a life member with IEEE and has continued to get pleasure from electronics ever since his childhood. Mike has an extended profession spanning Honeywell, Northrop Grumman, Insyte/ITT/Exelis/Harris, ViaSat and retiring (semi) with Wyatt Labs. Throughout his profession he gathered 32 US Patents and prior to now printed just a few EDN Articles together with Greatest Thought of the 12 months in 1989.

Associated Content material

References

  1. Chen, M. R. D. Rodrigues and I. J. Wassell, “A Frechet Imply Strategy for Compressive Sensing Date Acquisition and Reconstruction in Wi-fi Sensor Networks,” in IEEE Transactions on Wi-fi Communications, vol. 11, no. 10, pp. 3598-3606, October 2012, doi: 10.1109/TWC.2012.081612.111908.
  2. https://www.eevblog.com/discussion board/tasks/interesting-amplifier-topology/
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