Categories: Electronics

Microchip Unveils Business’s Highest Efficiency 64-bit HPSC Microprocessor (MPU) Household for a New Period of Autonomous Area Computing


New know-how ecosystem can be launched as Microchip collaborates with over a dozen system and software program companions to speed up PIC64-HPSC adoption

The world has modified dramatically within the 20 years for the reason that debut of what was then thought of a trail-blazing space-grade processor utilized in NASA missions such because the comet-chasing Deep Affect spacecraft and Mars Curiosity rover car. A report launched by the World Financial Discussion board estimated that the area {hardware} and the area service {industry} is ready to develop at a CAGR of seven% from 2023’s $330 billion {dollars} to $755 billion {dollars} by 2035. To help a various and rising international area market with a quickly increasing number of computational wants, together with extra autonomous purposes, Microchip Know-how has launched the primary units in its deliberate household of PIC64 Excessive-Efficiency Spaceflight Computing (PIC64-HPSC) microprocessors (MPUs).

Not like earlier spaceflight computing options, the radiation- and fault-tolerant PIC64-HPSC MPUs, which Microchip is delivering to NASA and the broader protection and business aerospace {industry}, combine extensively adopted RISC-V CPUs augmented with vector-processing instruction extensions to help Synthetic Intelligence/Machine Studying (AI/ML) purposes. The MPUs additionally function a set of options and industry-standard interfaces and protocols not beforehand obtainable for area purposes. A rising ecosystem of companions is being assembled to expedite the event of built-in system-level options. This ecosystem options Single-Board Computer systems (SBCs), space-grade companion parts and a community of open-source and business software program companions.

“This can be a large leap ahead within the development and modernization of the area avionics and payload know-how ecosystem,” mentioned Maher Fahmi, company vp, Microchip Know-how’s communications enterprise unit. “The PIC64-HPSC household is a testomony to Microchip’s longstanding spaceflight heritage and our dedication to offering options constructed on industry-leading applied sciences and a complete programs method to speed up our clients’ growth course of.”

The Radiation-Hardened (RH) PIC64-HPSC RH is designed to offer autonomous missions the native processing energy to execute real-time duties comparable to rover hazard avoidance on the Moon’s floor, whereas additionally enabling long-duration, deep-space missions like Mars expeditions requiring extraordinarily low-power consumption whereas withstanding harsh area circumstances. For the business area sector, the Radiation-Tolerant (RT) PIC64-HPSC RT is designed to fulfill the wants of Low Earth Orbit (LEO) constellations the place system suppliers should prioritize low price over longevity, whereas additionally offering the excessive fault tolerance that’s very important for round the clock service reliability and the cybersecurity of area property.

PIC64-HPSC MPUs supply a wide range of capabilities, a lot of which weren’t beforehand obtainable for area computing purposes, together with:

  • Area-grade 64-bit MPU structure: Consists of eight SiFive RISC-V X280 64-bit CPU cores supporting virtualization and real-time operation, with vector extensions that may ship as much as 2 TOPS (int8) or 1 TFLOPS (bfloat16) of vector efficiency for implementing AI/ML processing for autonomous missions.
  • Excessive-speed community connectivity: Features a 240 Gbps Time Delicate Networking (TSN) Ethernet swap for 10 GbE connectivity. Additionally helps scalable and extensible PCIe Gen 3 and Compute Categorical Hyperlink (CXL) 2.0 with x4 or x8 configurations and consists of RMAP-compatible SpaceWire ports with inner routers.
  • Low-latency information transfers: Consists of Distant Direct Reminiscence Entry (RDMA) over Converged Ethernet (RoCEv2) {hardware} accelerators to facilitate low-latency information transfers from distant sensors with out burdening compute efficiency, which maximizes compute capabilities by bringing information near the CPU.
  • Platform-level defense-grade safety: Implements defense-in-depth safety with help for post-quantum cryptography and anti-tamper options.
  • Excessive fault-tolerance capabilities: Helps Twin-Core Lockstep (DCLS) operation, WorldGuard {hardware} structure for end-to-end partitioning and isolation, and an on-board system controller for fault monitoring and mitigation.
  • Versatile energy tuning: Consists of dynamic controls to stability the computational calls for required by the a number of phases of area missions with tailor-made activation of capabilities and interfaces.

“Microchip’s PIC64-HPSC household replaces the purpose-built, obsolescence-prone options of the previous with a high-performance and scalable space-grade compute processor platform supported by the corporate’s vibrant and rising growth ecosystem,” mentioned Kevin Kinsella, Architect – System Safety Engineering with Northrop Grumman. “This revolutionary and forward-looking structure integrates the very best of the previous 40-plus years of processing know-how advances. By uniquely addressing the three essential areas of reliability, security and safety, we totally anticipate the PIC64-HPSC to see widespread adoption in air, land and sea purposes.”

In 2022, NASA chosen Microchip to develop a Excessive-Efficiency Spaceflight Computing processor that would present no less than 100 instances the computational capability of present spaceflight computer systems. This key functionality would advance future area missions, from planetary exploration to lunar and Mars floor missions. The PIC64-HPSC is the results of that partnership. Representatives from NASA, Microchip and {industry} leaders like Northrop Grumman will share insights in regards to the HPSC know-how and ecosystem on the IEEE Area Compute Convention 2024, July 15–19 in Mountain View, California:

  • Convention Keynote – Dr. Prasun Desai, Deputy Affiliate Administrator, Area Know-how Mission Directorate, NASA: Dr. Desai will converse in regards to the company’s technique for superior computing and funding in HPSC know-how.
  • HPSC Workshop, “HPSC: Redefine What’s Attainable for the Way forward for Area Computing”: Prasun Desai will be a part of Microchip and JPL audio system to supply an summary of HPSC program and platform. Invited aerospace {industry} associate Kevin Kinsella from Northrop Grumman will even share insights on the importance of HPSC for spaceflight computing. A Q&A session will observe.

Microchip’s inaugural PIC64-HPSC MPUs have been launched in tandem with the corporate’s PIC64GX MPUs that allow clever edge designs within the industrial, automotive, communications, IoT, aerospace and protection segments. With the launch of its PIC64GX MPU household, Microchip has develop into the one embedded options supplier actively growing a full spectrum of 8-, 16-, 32- and 64-bit options.

Microchip has a broad portfolio of options designed for the aerospace and protection market together with processing with Radiation-Tolerant (RT) and Radiation-Hardened (RH) MCUs, FPGAs and Ethernet PHYs, energy units, RF merchandise, timing, in addition to discrete parts from naked die to system modules. Moreover, Microchip gives a variety of parts on the High quality Merchandise Record (QPL) to raised serve its clients.

Complete Ecosystem

Microchip’s new PIC64-HPSC MPUs might be supported by a complete space-grade ecosystem and innovation engine that encompasses flight-capable, industry-standard SBCs, a group of open-source and business software program companions and the implementation of frequent business requirements to assist streamline and speed up the event of system-level built-in options. Early members within the ecosystem embrace: SiFive, Moog, IDEAS-TEK, Ibeos, 3D PLUS, Micropac, Wind River, Linux Basis, RTEMS, Xen, Lauterbach, Entrust and lots of extra. For data go to Microchip’s PIC64-HPSC MPU ecosystem companions webpage.

Microchip will even supply a complete PIC64-HPSC analysis platform that comes with the MPU, an growth card and a wide range of peripheral daughter playing cards.

Pricing and Availability

PIC64-HPSC samples might be obtainable to Microchip’s early entry companions in 2025. For extra data, please contact a Microchip gross sales consultant.


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