Cadence Unveils Palladium Z3 and Protium X3 Techniques to Usher in a New Period of Accelerated Verification, Software program Growth and Digital Twins

• Cadence’s new dynamic duo provides greater than 2X elevated capability and is 1.5X sooner than the earlier technology, enabling the speedy improvement of superior chips for generative AI, cellular, automotive, hyperscale and LLM functions
• Palladium Z3 emulator contains a new customized Cadence emulation processor that delivers the quickest, most predictable compile and complete pre-silicon {hardware} debug
• Protium X3 prototyping provides the quickest bring-up instances for pre-silicon software program validation of billion-gate designs
• Seamlessly built-in move with unified compiler and customary digital and bodily interfaces provides speedy design migration and testing from emulation to prototyping

Cadence Design Techniques, Inc. (Nasdaq: CDNS) in the present day introduced the brand new Cadence^® Palladium^® Z3 Emulation and Protium^™ X3 FPGA Prototyping methods, a revolutionary digital twin platform that builds on the success of the industry-leading Palladium Z2 and Protium X2 methods to sort out escalating system and semiconductor design complexity, and to speed up the event timeline for probably the most superior SoCs. Palladium and Protium methods have lengthy been trusted by market-shaping AI, automotive, hyperscale, networking and cellular chip firms to ship the very best throughput pre-silicon {hardware} debug and pre-silicon software program validation. Focused on the {industry}’s largest multi-billion-gate designs, the brand new Palladium Z3 and Protium X3 methods set a brand new customary of excellence, offering clients with greater than a 2X improve in capability and a 1.5X efficiency improve in comparison with previous-generation methods, enabling sooner design bring-up and shortening total time to market.

“As generational drivers speed up the necessity for system and semiconductor innovation, our clients are going through rising challenges to energy probably the most superior functions,” stated Paul Cunningham, senior vp and basic supervisor of the System Verification Group at Cadence. “The third technology Palladium and Protium dynamic duo methods are core parts of the Cadence Verification Suite and seamlessly interface with the Verisium AI-driven Verification Platform. The Cadence verification full move provides our clients the very best verification throughput wanted to ship their {hardware} improvements to market sooner and to help the speedy improvement of recent applied sciences, equivalent to generative AI.”

The Palladium Z3 and Protium X3 methods provide elevated capability, and scale from job sizes of 16 million gates as much as 48 billion gates, so the biggest SoCs could be examined as an entire fairly than simply partial fashions, guaranteeing correct performance and efficiency. The methods are powered by the NVIDIA BlueField DPU and NVIDIA Quantum InfiniBand networking platforms and keep congruency when transitioning between the 2 methods and transitioning from digital to bodily interfaces and vice versa. The Palladium Z3 system accelerates {hardware} verification, and thru useful and interface congruency, fashions could be shortly introduced up onto the Protium X3 system for accelerated software program validation.

“The supercharged Palladium Z3 and Protium X3 are constructed to ship quick pre-silicon verification and validation of the biggest and most advanced units,” stated Dhiraj Goswami, company vp, {Hardware} System Verification R&D at Cadence. “Our modern customized silicon and system structure, mixed with revolutionary modular compile and debug capabilities enabling a number of turns per day, continues to push the envelope to fulfill our clients’ wants, permitting them to resolve the world’s hardest challenges and allow their subsequent technology of improvements to develop into a actuality.”

“Constructing environment friendly, high-performance AI platforms requires subtle infrastructure and integration throughout a full stack of optimized methods and software program,” stated Scot Schultz, senior director, Networking at NVIDIA. “Accelerated by NVIDIA networking, the next-generation Cadence Palladium and Protium methods push the boundaries of capability and efficiency to assist allow a brand new period of generative AI computing.”

With the Palladium Z3 system’s new domain-specific apps, customers have entry to probably the most full providing for managing rising system and semiconductor design complexity, enhancing system-level accuracy, and accelerating low-power verification. The domain-specific apps embody the {industry}’s first 4-State Emulation App, the Actual Quantity Modeling App, and the Dynamic Energy Evaluation App.

“As SoCs develop into extra advanced, scalable validation and verification instruments that allow large software program testing earlier than tapeout are extra important than ever,” stated Tran Nguyen, senior director of design companies, Arm. “The most recent {hardware} verification platforms and instruments from Cadence are sparking innovation in Arm IP design for AI, automotive, and information middle functions, and we sit up for how this may profit our mutual clients.”

“Delivering on management computing merchandise requires AMD to convey collectively a mess of pre-silicon options and methods to fulfill the size of the verification problem,” stated Alex Starr, Company Fellow, AMD. “Cadence Palladium Z3 and Protium X3 methods add to our capabilities between emulation and enterprise prototyping to enhance design productiveness and meet time-to-market objectives. Our collaboration with Cadence additionally incorporates the AMD Versal™ Premium VP1902 adaptive SoC inside the Protium X3 system in addition to AMD EPYC™ processor-based host servers certified for each the Palladium Z3 and Protium X3 methods to allow excessive capability with next-level efficiency and scalability.”

The Palladium Z3 and Protium X3 methods are a part of the broader Cadence Verification Suite and help the corporate’s Clever System Design^™ technique, enabling SoC design excellence. The methods have been deployed at choose clients, with basic availability anticipated in Q3 2024. For extra info on the brand new Palladium Z3 and Protium X3 methods, please go to www.cadence.com/go/dynamicduo3.