Awhile again I printed a easy design thought for a thermal airspeed sensor primarily based on a self-heated Darlington transistor pair. The ensuing sensor is easy, delicate, and solid-state, however suffers from a radically nonlinear airspeed response, as proven in Determine 1.
Determine 1 The Vout versus airspeed response of the thermal sensor could be very nonlinear.
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Veteran design thought contributor Jordan Dimitrov has offered a chic computational numerical resolution for the issue that makes the ultimate consequence practically completely linear. He particulars it in Correct perform linearizes a scorching transistor anemometer with lower than 0.2 % error.
Nonetheless, a consequence of performing linearization within the digital area after analog to digital conversion is a major enhance in required ADC decision, e.g., from 11 bits to fifteen, right here’s why…
Acquisition of a linear 0 to 2000 fpm airspeed sign resolved to 1 fpm would require an ADC decision of 1 in 2000 = 11 bits. However inspection of Determine 1’s curve reveals that, whereas the complete scale span of the airspeed sign is 5 V, the sign change related to an airspeed increment of 1999 fpm to 2000 fpm is barely 0.2 mV. Thus, to maintain the previous on scale whereas resolving the latter, wants a minimal ADC decision of:
1 in 5 / 0.0002 = 1 in 25,000 = 14.6 bits
15-bit (and better decision) ADCs are neither uncommon nor particularly costly, however they’re not often built-in peripherals inside microcontrollers as talked about in Mr. Dimitrov’s article. So, it appears believable {that a} important price is perhaps related to provision of an ADC with decision sufficient for his design. I questioned about what options may exist.
Right here’s a design for easy and low-cost high-resolution ADC constructed round an outdated, cheap, and extensively accessible buddy: the 555 analog timer chip.
See Determine 2 for the schematic.
Determine 2 Excessive decision voltage-to-time ADC appropriate for self-heated transistor anemometer linearization. An asterisk denotes precision parts (1% tolerance).
Sign acquisition begins with the R2, R3, U1 summation community combining the 0 to five V enter sign with U1’s 2.5v precision reference to type:
V1 = (Vin + 2.5v)/2 = 1.25 to three.75v = (0 to three) * 1.25v
V1 accumulates on C1 between conversion cycles with a time fixed of:
(R2R3/(R2 + R3) + R1)C1 = 1.1M * 0.039 µF = 42.9 ms
Thus, for 16 bit accuracy, a minimal settling time is required of:
42.9 ms LOGe(216) = 480 ms
The precise conversion cycle can then be began by inputting a CONVERT command pulse (>2.5v amplitude and >1 microsecond length) to the 555 Vth (threshold) pin 6 as illustrated in Determine 3.
Determine 3 ADC cycle begins with a CONVERT Vth pulse that generates an OUT pulse of length Tout = LOGe(V1 / 1.25 V)R1C1.
The OUT pulse (low true) begins with the rising fringe of CONVERT and is coincident with the 555 Dch (discharge) pin 7 being pushed to zero volts, starting the discharge of C1 from V1 to the 555 set off voltage (Vtrg = Vc/2 = 1.25v) on pin 7. The length of C1 discharge and Tout, amassed digitally (a counter of 16 bits and determination of 1µs is sufficient) by an acceptable microcontroller, are given by:
Tout = LOGe(V1 / 1.25 V)R1C1 = LOGe(V1 / 1.25 V) 1M * 0.039 µF
= LOGe((Vin + 2.5 V) / 2.5 V) 39 ms
= LOGe(1) 39 ms = 0 for Vin = 0
= LOGe(3) 39 ms = 42.85 ms for Vin = 5 V
On the finish of Tout, Dch is launched so the recharge of C1 can start, and the conversion consequence:
(N = 1 MHz * Tout)
is on the market for linearization computation. The mathematics to decode and get well Vin is given by:
Vin = 2.5 V (EXP(N / 39000) – 1)
A closing phrase. You could be questioning about one thing. Earlier I mentioned a decision of 1 half in 25000 = 14.6 bits can be wanted to quantify the Vin delta between 1999 and 2000 fpm. So, what’s all this 42850 = 15.4 bits stuff?
The 42850 factor arises from the truth that the instantaneous slope (charge of change = dV/dT) of the C1 discharge curve is proportional to the voltage throughout, and subsequently the present by, R1. For a full-scale enter of Vin = 5 V, this parameter adjustments by an element of 3 from V1 = 3.75 V and 3.75 µA initially of the conversion cycle to solely 1.25 V and 1.25 µA on the finish. This enhance in dV/dT causes a proportional however reverse change in decision. Consequently, to realize the specified 25000:1 decision at Vin = 5 V, a better common decision is required.
The mandatory decision issue bump is sq. root (3) = 1.732… of which 42850 / 25000 = 1.714 is a tough and prepared, however sufficient, approximation.
Stephen Woodward’s relationship with EDN’s DI column goes again fairly a great distance. Over 100 submissions have been accepted since his first contribution again in 1974.
Associated Content material
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